Senior Digital Design Engineer
San Jose, United States
- Posted 1w ago
- From Astera Labs’s careers page
- Location
- San Jose, United States
- Level
- Senior
- Experience
- 3+ years
- Department
- Design
Opens the listing on job-boards.greenhouse.io
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About the role
Job Description
We are looking for Digital Design Engineers with experience developing micro-architecture and implementation of the front-end circuit design, including RTL, synthesis, IP integration for high performance network controllers. The candidate is preferred to have knowledge of communication/interface protocols such as PCI-Express (Gen-3 and above), Ualink, Esun, Ethernet etc.
Basic Qualifications:
- Strong academic and technical background in electrical engineering. A Bachelor’s degree in EE is required, and a Master’s degree is preferred.
- Professional attitude with the ability to prioritize a dynamic list of multiple tasks.
- Entrepreneurial, open-mind behavior and can-do attitude.
- Authorized to work in the US and start immediately.
Required Experience:
- Hands-on, prefer knowledge of high-speed protocols like PCIe, Ualink, Esun, Ethernet, etc.
- Proven front end design skill – architecture, RTL, simulations and synthesis
- Experience with Synopsys and/or Cadence digital design tools/flows
- Knowledge of design for test (DFT)
- Familiarity with UVM based design verification
- Silicon bring-up and debug experience
Preferred Experience:
- Scripting with Python or other equivalent programming languages.
- Development/support for PCIe or Ethernet Switch products.
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About Astera Labs
Connectivity solutions for rack-scale AIAstera Labs develops semiconductor connectivity solutions for rack-scale AI systems, including PCIe, CXL, Ethernet, and other interconnect technologies.
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