Staff Engineer,Post-Silicon Validation

Who You Are

• You are a seasoned post-silicon engineer with 5+ years of experience in SoC bring-up, validation, and silicon debug.
• You have a strong grasp of CPU and SoC architectures, including RISC-V privilege modes, caches, coherency, and memory systems.
• You are comfortable debugging complex hardware/software interaction issues using lab tools and low-level software.
• You thrive in cross-functional environments and enjoy working closely with RTL, firmware, and software teams to solve hard problems.

What We Need

• Lead first-silicon bring-up of RISC-V CPU–based SoCs and execute post-silicon validation plans.
• Debug silicon issues across CPU cores, interconnects, memory subsystems, peripherals, and high-speed interfaces.
• Develop and debug bare-metal tests, boot flows, and collaborate on Linux bring-up and driver validation.
• Provide actionable feedback, support ECO validation, and drive fixes for future silicon revisions.

What You Will Learn

• Deep hands-on exposure to cutting-edge RISC-V SoCs, AI accelerators, and high-performance compute platforms.
• End-to-end ownership across the silicon lifecycle—from first silicon to stable production.
• Advanced silicon debug techniques spanning hardware, firmware, and operating systems.
• Opportunities to influence architecture, validation strategy, and future silicon direction in a highly visible role.