Silicon Validation Engineer

Lattice Overview:

There is energy here. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality.

Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a team first organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you're looking for.

What Will You Get to Do?:

Do you have a passion for invention and self-challenge? This position gives you an opportunity to learn and participate in one of the most cutting-edge projects that Lattice's Silicon Engineering team has embarked upon to date.

We are validating building blocks in FPGA on board level to ensure functionality and performance aspect of Design intent. FPGA consists of various IPs as a building block such as SERDES (PMA/PCS), Memory DDR (DDR4, LPDDR4, DDR5 etc), DPHY, PLL, DSP, Fabric, I/O etc. As a Silicon Design Validation engineer, you will have an opportunity to learn and train yourself on how to validate one or many of the building blocks within the FPGA. You will also acquire knowledge on process and methodology required for validating certain IPs from planning to completion. While you are working on those, you will be exposed to cutting edge equipment and advanced boards as well as various SW, tools, and scripts.

What you're going to be exposed to and learn:

The ideal candidate is highly motivated in developing a career in Silicon Design Validation engineering. You will get significant exposure and training in the following areas:

• Chance to learn FPGA and its building blocks such as SERDES (PMA/PCS), Memory DDR (DDR4, LPDDR4, DDR5 etc), DPHY, PLL, DSP, MIPI, Fabric, I/O etc but not limited.
• Validate and characterize various IPs from silicon arrival to release to production.
• Develop validation and characterization plans for certain IP, bench hardware and software.
• Develop test logic RTL to achieve intended validation and characterization test.
• Drive new silicon product bring-up, validation, debug to assess IP functionality and performance. Characterize data sheet parameters. Analyze the measured data with statistical view. Data sheet preparation etc.
• Serve as the central resource with design, verification, manufacturing, test, quality and marketing/apps as the product(s) move from silicon arrival to product release.
• Support customer issues as required to resolve issues found after product release.

You Have:

• 2+ years of experience
• Electrical Engineering degree with a strong desire to pursue an engineering career in Silicon Design Validation
• Expertise in High Speed Serdes Interface characterization and protocol compliance testing such as PCIe, Ethernet, SDI, CoaXpress, JESD204, MIPI D-PHY, MIPI CSI/DSI-2, USB and DisplayPort/HDMI etc.
• Expertise in high speed board design and signal integrity evaluation and debug.
• Expertise in Verilog/VHDL and design implementation using FPGA development tools.
• Expertise in test automation development using programming languages such as Python and Perl.
• Knowledge of statistical analysis concepts and use of analysis tools such as JMP and R.
• Proficiency with bench equipment for device characterization such as BERT, VNA, Oscilloscopes, Protocol Exerciser/Analyzers.
• Exposure to FPGA emulation and prototyping etc.
• Strong written and verbal communication skills to work with cross-functional team.
• Self-motivated and proactive with critical thinking.
• Good problem solving and debugging skills.

#LI-DNP

Pay and Benefits:

Consistent with Lattice Semiconductor values and applicable law, we provide the following information to promote pay transparency and equity. We have a market-based pay structure which varies by location. Please note that the base pay range is a guideline, and our compensation range reflects the cost of labor in the U.S. geographic market based on the location of the role. Pay within these ranges varies and depends on job-related knowledge, skills, and relevant work experience.

For candidates who receive and offer, the starting salary will vary based on various factors including, but not limited to, such qualifications as skill level, competencies, and work location. The range provided may represent a candidate range and may not reflect the full range for an individual tenured employee.

Base Pay Range:

170400

In addition to base pay, this role may be eligible for variable or incentive compensation and/or equity. In addition, this role is eligible for a comprehensive, competitive benefits package which may include healthcare and retirement plans, paid time off, and more!

Additional Information:

This position requires a successful background and reference checks and satisfactory proof of your right to work in the United States.

Lattice recognizes that employees are its greatest asset and the driving force behind success in a highly competitive, global industry. Lattice continually strives to provide a comprehensive compensation and benefits program to attract, retain, motivate, reward and celebrate the highest caliber employees in the industry.

Lattice is an international, service-driven developer of innovative low cost, low power programmable design solutions. Our global workforce, some 1,000 strong, shares a total commitment to customer success and an unbending will to win. Applications are welcome from all qualified candidates.

As an E-Verify employer, we use this system to confirm the employment eligibility of all new hires in accordance with federal law. All applicants will be required to complete a Form I-9, Employment Eligibility Verification, upon hire. We do not use E-Verify to pre-screen job candidates and will comply with all E-Verify regulations.